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國立臺北科技大學 學術資源網

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李文達副教授LEE NEW-TA

現職:
臺北科大/電子工程系
聯絡方式:

期刊論文

  • "The Construction and Implementation of Wireless Network Online Learning System based on Edge Computing", International Journal of Emerging Technologies in Learning, Vol. 17, No 21, pp. 275-295, 2022/12, EI
  • "A Design and Application of Municipal Service Platform Based on Cloud-Edge Collaboration for Smart Cities", SENSORS, Vol. 22, 8784, 2022/11, SCI
  • "Turbo Decoder Design Employing a New Phase Estimation Hard Decision Stopping Criterion Method", International Journal of Computer Theory and Engineering, Vol. 4, No. 6, pp. 963-966, 2012/12, ELSE2
  • "Tunable mixed-mode OTA-C universal filter", Analog Integrated Circuits and Signal Processing, Vol. 58, Issue 2, pp.135-141, 2009/02, SCI&EI
  • "NEW VOLTAGE-MODE MULTI-FUNCTION BIQUAD FILTER USING CURRENT CONVEYORS & OTAs", Journal of Circuits, Systems and Computers, Vol. 62, Issue 9, 701-704, 2008/02, SCI&EI
  • "Using Stack Reconstruction on RTL Orthogonal Scan Chain Design", Journal of Information Science and Engineering, Vol. 22, No. 6, 1585-1599, 2006/11, SCI&EI
  • "A Fractional Frequency Synthesizer Based on ADPLL", International Journal of Electrical Engineering, v12, n4, p 325-332, 2005/11, EI
  • "Power and Data Transfer Techniques Applied for RFID Systems", International Journal of Electrical Engineering, v12, n3, p 261-267, 2005/08, EI
  • "A 10-Bit Switched-Current Digital to Analog Converter", IEE Proc.- Circuits, Device and Systems, Vol 152, N0. 3, 287-290, 2005/06, SCI&EI
  • "Cell Compaction with Jogs Insertion Based on 45°-Shear Line", Journal of Technology, Vol. 20, No. 1, pp. 83-90, 2005/03, ELSE2
  • "An embedded analog spatial filter design of the current-mode CMOS image sensor", IEEE Trans. on Consumer Electronics, vol. 42, No. 1, pp. 945-951, 2004/08, SCI
  • "Design and Implementation of a Portable MP3 Player", Journal of National Taipei University of Technology, Vol. 37-1, pp. 159-168, 2004/03, ELSE1
  • "A Window-based Reconfigurable Punctured Convolutional Encoder/Decoder IP Builder", Journal of National Taipei University of Technology, Vol. 37-1, pp. 149-158, 2004/03, ELSE1
  • "Design of a Software Synthesis Tool for Real-Time Embedded System", Journal of National Taipei University of Technology, Vol. 37-1, pp. 179-196, 2004/03, ELSE1
  • "Prediction-Based Ahead on Simulated Annealing for Array Placement", Journal of National Taipei University of Technology, Vol. 37-1, pp. 215-222, 2004/03, ELSE1
  • "RLC Exact Zero-Skew Algorithm", Journal of National Taipei University of Technology, Vol. 37-1, pp. 223-232, 2004/03, ELSE1
  • "Chip Design of Low Power Motion Detection Processor", Journal of National Taipei University of Technology, Vol. 35-1, pp. 131-140, 2003/03, ELSE1
  • "Chip Implementation for Improved Booth Multiplier", Journal of National Taipei University of Technology, Vol. 35-1, pp. 141-148, 2002/03, ELSE1
  • "Edged Shear Line Techniques Applied to Cell Compaction", Journal of National Taipei University of Technology, Vol. 35-1, pp. 103-114, 2002/03, ELSE1

研討會論文

  • "新式脈波縮減元件之溫度感測器晶片設計", 2023第十七屆積體光機電科技與智慧財產權實務研討會, 台北, 2023/05/15
  • "10 位元25MS/s 具冗餘補償電容之連續漸進式類比數位轉換器晶片設 計", 2023第十七屆積體光機電科技與智慧財產權實務研討會, 台北, 2023/05/15
  • "低靈敏溫度震盪器時域溫度感測器晶片設計", 2023第十七屆積體光機電科技與智慧財產權實務研討會, 台北, 2023/05/15
  • "具自我測試之冗餘補償電容連續漸進式類比數位轉換器晶片設計", 2022第十六屆積體光機電科技與智慧財產權實務研討會, Taipei, 2022/05/17
  • "具溫度補償自我振盪之高轉換率時域溫度感測器晶片設計", 2022第十六屆積體光機電科技與智慧財產權實務研討會, Taipei, 2022/05/17
  • "連續漸進與校正類比數位轉換器晶片設計", 2021第十五屆積體光機電科技與智慧財產權實務研討會, Taipei, 2021/05/25
  • "十二位元導管快閃式類比數位轉換器晶片設計", 2021第十五屆積體光機電科技與智慧財產權實務研討會, Taipei, 2021/05/25
  • "結合生醫晶片之仿生手臂平台設計", 2019資訊科技應用國際學術研討會(ITAC2019), 新竹, 2019/06/05
  • "具自我檢測之高轉換率時域溫度感測器晶片設計", 2019資訊科技應用國際學術研討會(ITAC2019), 新竹, 2019/06/05
  • "Chip Design of Low-voltage SAR ADC with Adjustable Building-in-self-testing", 2018 Conference on Photonics and Smart Electronics, 桃園, 2018/06/01
  • "Design of Human Sensor Chip for Bionic Robot Arm", 2018 Conference on Photonics and Smart Electronics, 桃園, 2018/06/01
  • "Chip Design of a High Conversion Rate Time-domain Temperature Sensor with one-point calibration", 2018 Conference on Photonics and Smart Electronics, 桃園, 2018/06/01
  • "具可調式提早疊代之類比式最小和LDPC解碼晶片設計", 2016 Intelligent Living Technology Conference, 台中, 2016/06/03
  • "類比式(8,4)最小和LDPC解碼晶片設計", 2016電子,信號,與通訊創新科技研討會, 高雄市, 2016/05/27
  • "具內建自我測試之低密度奇偶檢查碼校驗器晶片實作", 2015光電與通訊工程應用研討會, 高雄, 2015/11/27
  • "具事前偵測之類比最小和低密度同位元校驗解碼器晶片設計", 2015 年民生電子研討會, 彰化, 2015/11/27
  • "類比式一維及新型二維正規化最小和低密度同位元校驗碼解碼器晶片設計", The 2013 Workshop on Consumer Electronics, 宜蘭市, 2013/11/22
  • "IC Design of a Low-power Analog LDPC Decoder Employing New Stopping Iteration Method", The 2013 IEEE International Conference on Green Computing and Communications, 北京, 2013/08/20
  • "具快速暫態及高電源拒斥之無輸出電容低壓降電壓調整器", 2013 電子,信號,與通訊創新科技研討會, 高雄市, 2013/05/31
  • "供D類放大器用之高取樣脈波寬度調變晶片設計", 2012 Workshop on Consumer Electronics, 雲林, 2012/11/16
  • "具高電流單頻電荷之幫浦晶片研製", 2012 Workshop on Consumer Electronics, 雲林, 2012/11/16
  • "具快速暫態響應之無輸出電容低電壓調整器晶片設計", 2012 Workshop on Consumer Electronics, 雲林, 2012/11/16
  • "Chip Implementation of an Analog Array Sum-Product Decoder for (8,4) LDPC codes", 2012 Conference on Photonics and Communications, 高雄, 2012/10/26
  • "IC Design of an Analog Min-Sum LDPC Decoder Employing New Stopping Iteration Method", 2012 Conference on Photonics and Communications, Taiwan, 高雄, 2012/10/26
  • "A New Low Latency Parallel Turbo Decoder Employing Parallel Phase Decoding Method", 2012 Algorithms and Architectures for Parallel Processing, 福岡, 2012/09/04
  • "Chip Implementation of a Capacitor-Free LDO with Improved Immunity against ProcessVariations", 2012 VLSI Design/CAD Symposium, 屏東墾丁, 2012/08/07
  • "A New Low Latency Parallel Turbo Decoder with Synchronous Output", 2012 VLSI Design/CAD Symposium, 屏東墾丁, 2012/08/07
  • "Chip Design of an Analog Sum-Product Decoder for (8,4) LDPC Codes", 2011 VLSI Design/CAD Symposium, 雲林, 2011/08/02
  • "Turbo Decoder Design Employing a New Phase Estimation Hard Decision Stopping Criterion Method", 2011 4th IEEE International Conference on Computer Science and Information Technology (ICCSIT 2011), 成都, 2011/06/10
  • "A 3g sample/s modified low power flash ADC with frequency synthesizer", 2010 International Conference on High-Speed Circuits and Design, 台中, 2010/10/28
  • "Chip Design of Low-Quiescent-Current Pseudo-Digital Error Amplifier Low Dropout Voltage Regulator with Damping Detection Circuit", 2010 International Conference on High-Speed Circuits and Design, 台中, 2010/10/28
  • "Chip design of 1MHz ~ 2GHz for universal frequency synthesize", 2010 Innovative Applications of System Prototyping and Circuit Design, 桃園縣中壢市, 2010/10/15
  • "Chip Design of a New Voltage-mode Multi-function Biquad Filter Using Current-mode Elements", 2010 Innovative Applications of System Prototyping and Circuit Design, 桃園縣中壢市, 2010/10/15
  • "Chip design of analog iterative decoder for a (8,4) LDPC code", 2010 VLSI Design/CAD Symposium, 高雄, 2010/08/03
  • "Chip Design of New Low Power Flash ADC Employing Voltage Reference-Selection Method", The 25th International Technical Conference on Circuits/Systems, Computers and Communications, Pattaya, 2010/07/04
  • "A High Precision Ramp Generator for Low Cost ADC Test", The 2008 International Conference on Solid-State and Integrated-Circuit Technology (ICSICT2008), Beijing, 2009/10/20
  • "New Design for a Reset IC of Mobile Device", The 13th IEEE International Symposium on Consumer Electronics (ISCE2009), 京都, 2009/05/25
  • "VLSI Architecture Design for WiMAX Channel Encoder/Decoder", The 2008 Conference on Innovative Applications of System Prototyping and Circuit Design(PAL2008), 台中, 2008/10/17
  • "IC Design of Turbo Decoder Using New Adaptive Iteration Algorithm", The 2008 IEEE VTS Asia Pacific Wireless Communications Symposium, Sendai, 2008/08/21
  • "VLSI Architecture for Low Power Turbo Decoder using Adaptive Sliding Window Algorithm", The 2007 IEEE International Conference on Electron Devices and Solid-State Circuits(EDSSC2007), Tainan, 2007/12/20
  • "A New Low Power Flash ADC Using Multiple-Selection Method", The 2007 IEEE International Conference on Electron Devices and Solid-State Circuits(EDSSC2007), Tainan, 2007/12/20
  • "Chip Design of Threee-Phase BLDC Motor Brake Driver IC", The 2007 IEEE International Conference on Electron Devices and Solid-State Circuits(EDSSC2007), Tainan, 2007/12/20
  • "An Efficient Power Reduction Technique for Flash ADC", IEEE International SOC Conference(SOCC), 2007/09/17
  • "A New Current-Mode Wheatstone Bridge Based on Fully Differential Operational Transresistance Amplifiers", The 18th VLSI Design/CAD Symposium, 2007/08/07
  • "A New Multi-Function Wave Generator Based on Multiple-Output Second-Generation Current Conveyors", The 18th VLSI Design/CAD Symposium, 2007/08/07
  • "New Low Supply-Bounce Current-Mode Shunt Regulator", The 18th VLSI Design/CAD Symposium, 2007/08/07
  • "High-Order Current- Mode Filters Based on Current Differencing Buffered Amplifiers", IEEE International Conference on Communications, Circuits and Systems (ICCCAS), 2007/07/11
  • "Joint Source-channel Decoder for H.264 Coded Video Employing Fuzzy Adaptive Method", The 2007 International Conference on Multimedia & Expo (ICME2007), Beijing, 2007/07/02
  • "A Low Power Flash Analog-to-Digital Converter Using Level-Detection Method", The 2006 International Computer Symposium (ICS2006), Taipei, 2006/12/04
  • "VLSI Architecture Design of a New One_L SISO decoder", The 2006 National Symposium on Telecommunication, Kaoshiung, 2006/12/01
  • "IC Design of a New Multi-Function Biquad Filter", The 2006 VLSI DESIGN/CAD Symposium, Hualien, 2006/08/08
  • "Integrated Boost Converter Hysteresis-Current-Controlled Techniques", The 2006 VLSI DESIGN/CAD Symposium, Hualien, 2006/08/08
  • "New Hysteresis-Controlled DC-DC Current Converter", The 2006 VLSI DESIGN/CAD Symposium, Hualien, 2006/08/08
  • "New Low Power-Bounce Phase-Locked Loop", The 2006 VLSI DESIGN/CAD Symposium, Hualien, 2006/08/08
  • "A New VLSI Architecture for Turbo Decoder Employing De-interleaver Table Free Method", The 2006 International Conference on Communications, Circuits and Systems, Guilin, 2006/06/25
  • "Hysteresis-Current-Controlled Class-D Amplifier with Active Current Sensing Techniques", The 2006 International Conference on Communications, Circuits and Systems, Guilin, 2006/06/25
  • "Hysteresis-Current-Controlled Buck Converter Suitable for Li-Ion Battery Charger", The 2006 International Conference on Communications, Circuits and Systems, Guilin, 2006/06/25
  • "New Li-Ion Battery Charger Based on Charge-Pump Techniques", The 2006 International Conference on Communications, Circuits and Systems, Guilin, 2006/06/25
  • "A Dummy-Beta Latency Free VLSI Architecture for MAP Decoder", The 2006 International Workshop on Multi-project Chip (IWMC’06), Taipei, 2006/04/01
  • "A Novel Low Latency SW-BCJR Algorithm for Turbo Decoder", The 2006 International Workshop on Multi-project Chip (IWMC’06), Taipei, 2006/04/01
  • "A New Efficient Normalization VLSI Architecture for MAP Decoder", The 2005 International Symposium on Communications, Kaoshiung, 2005/11/20
  • "IC Design of a New Decision Device for Analog Viterbi Decoder", The 2005 International Symposium on Communications, Kaoshiung, 2005/11/20
  • "A De-interleaver Table Free VLSI Architecture for Turbo Decoder", The 2005 VLSI DESIGN/CAD Symposium, Hualien, 2005/08/09
  • "Fully Differential High-Order VHF Gm-C Filter Using Linear Transformation Techniques", The 2005 VLSI DESIGN/CAD Symposium, Hualien, 2005/08/09
  • "Li-Ion Battery Charger Based on Hysteresis-Current-Controlled Buck Converter", The 2005 VLSI DESIGN/CAD Symposium, Hualien, 2005/08/09
  • "A New Low-power Turbo Decoder Using HDA-DHDD Stopping Iteration", IEEE International Symposium on Circuits and Systems, Kobe, 2005/05/23
  • "High-Order Linear Transformation MOSFET-C Filters Using Operational Transresistance Amplifiers", IEEE International Symposium on Circuits and Systems, Kobe, 2005/05/23
  • "A New CCII-Based Pipelined Analog to Digital Converter", IEEE International Symposium on Circuits and Systems, Kobe, 2005/05/23
  • "A New Low-Power VLSI Architecture for SISO Decoder", Proc. of The 2005 International Conference on Systems and Signals, Kaohsiung, 2005/04/28
  • "A New Low Cost VLSI Architecture for Quantized Two Steps Search Algorithm of Motion Estimation", Proc. of The IEEE 2005 International Conference on Systems and Signals, Kaohsiung, 2005/04/28
  • "Hardware-Software Partitioning Tool Using Multiple Algorithms for FPGA Systems", Proc. of the IEEE International Conference on Systems and Signals, Kaohsiung, 2005/04/28
  • "Chip Design of A New SISO decoder", Proc. of The 2004 National Symposium on Telecommunication, Taipei, 2004/12/03
  • "應用模擬退火演算法在晶片系統之測試排程", Proc. of The 2004 ORTM, 2004/11/12
  • "A New Architecture for Data Phase-Locked Loops", Proc. of The 2004 Workshop on Consumer Electronics and Signal Processing (WCE), n, 2004/11/01
  • "RCGES: Retargetable Code Generation for Embedded Systems", the 2th International Symposium on Automated Technology for Verification and Analysis (ATVA), Taipei, 2004/10/31
  • "A Multi-Mode LDO-Based Li-Ion Battery Charger in 0.35μm CMOS Technology", Proc. of IEEE Asia-Pacific Conference on Circuits and Systems, Tainan, 2004/09/01
  • "SOC Test Scheduling Using Simulated Annealing Algorithm", Proc. The 15th VLSI Design/CAD Symposium, 2004/08/09
  • "Minimum Skew Upward Propagation in RLC Clock Tree", Proc. The 15th VLSI Design/CAD Symposium, 2004/08/01
  • "New CCII-Based Sample-and-Hold and MDAC Circuits for Pipelined ADC", Proc. The 15th VLSI Design/CAD Symposium, 2004/08/01
  • "New Power Saving Design Method for CMOS Flash ADC", Proc. Of The IEEE 47th International Midwest Symposium on Circuits and Systems, Hiroshima, 2004/06/01
  • "The RF Circuit Design for Magnetic Power and Data Transmission", Proc. Of The 2nd International Conference on Information Technology and Applications, Harbin, 2004/01/08
  • "A Retargetable Code Generation Methodology for Embedded Systems", the International Computer Symposium (ICS) 2004, 2004/01/01
  • "The RF Circuit Design for ISO/IEC 14443-2 Type B Contactless Transmission", Proc. of The 2003 International Symposium on Communications, 2003/12/10
  • "With Data Interlacing Reuse on Low Hardware Resource VLSI Design of Motion Estimation", Proc. of The 2003 International Symposium on Communications, 2003/12/10
  • "A Window Based Viterbi Decoder IP Builder for RCPC Codes", Proc. of The 2003 International Symposium on Communications, 2003/12/10
  • "Chip Implementation for CD-ROM Spindle Motor Driver", Proc. of 2003 Workshop on Consumer Electronics, Tainan, 2003/11/27
  • "Reconfigurable Punctured Encoder/Decoder IP Generator", Proc. of 2003 Workshop on Consumer Electronics, Tainan, 2003/11/27
  • "Antenna Design for Wireless Magnetic Coupling System", Taiwan EMC Conference, 2003/10/01
  • "Power and Data Transfer Techniques Apply for RFID System", Taiwan EMC Conference, 2003/10/01
  • "A Fractional Frequency Synthesizer Based on ADPLL", Proc. of The 2003 International Symposium on VLSI Technology, Systems and Applications, 2003/10/01
  • "The Design of Synthesis Tool for Interrupt-based Embedded Software", Proceedings of the International Conference on Informatics, Cybernetics, and Systems, Kauhsiung, 2003/09/14
  • "Chip Implementation for Power and Data Wireless Transfer", Proceedings of the International Conference on Informatics, Cybernetics, and Systems, Kauhsiung, 2003/09/14
  • "Clock Methodology Based on Grey Relation Clustering", Proceedings of the International Conference on Informatics, Cybernetics, and Systems, Kauhsiung, 2003/09/14
  • "Design of a Software Tool for Real-Time Embedded Systems", Proc. of the 14th Workshop on Object-Orient Technology and Applications, 2003/09/12
  • "An Analog Design of Spatial Filter Embedded in the CMOS Image Sensor", Proc. of The 2003 VLSI DESIGN/CAD Symposium, 2003/08/12
  • "An Efficient Lifting Based Architecture For 2-D DWT Used In JPEG-2000", Proc. of The 2003 VLSI DESIGN/CAD Symposium, 2003/08/12
  • "A Viterbi Decoder IP Builder for Punctured Convolutional Code", Proc. of The 2003 VLSI DESIGN/CAD Symposium, 2003/08/12
  • "A Retargetable Viterbi Decoder IP Generator", Proc. of The 2002 National Symposium on Telecommunication, 2002/09/12
  • "A Reversible VLSI Architecture for Analysis and Synthesis of Discrete Wavelet Transform", Proc. of The 2002 VLSI DESIGN/CAD Symposium, 2002/09/12
  • "A Novel High-Performance VLSI Architecture for Motion Estimation Using Data Access Exchange", Proc. of The 2002 VLSI DESIGN/CAD Symposium, 2002/08/12
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