Demonstration of automatic topology generation of calibration-free chipless RFID tags
We aim at bridging the gap between theoretical high-capacity chipless RFID and real-world applications. When the data capacity is enhanced as high as 30 bits, billions of chipless tags need to be addressed to accommodate each ID. Synthesizing the resonant frequencies of large numbers of tags requires significant time and efforts by performing iterative full-wave simulations. Moreover, when radar cross sections are implemented as a frequency signature, detecting these tags requires an additional run of calibration.
In this video, we demonstrate a new design technique that creates 1.68 million calibration-free chipless tags without performing iterative simulations. The performance is validated through residual plots and the measurement of a 20.7-bit chipless RFID system.
